The trend in integrated circuits to ever larger scales of integration has led to analog and digital circuits being combined on the same silicon substrate. Circuits such as analog to digital converters and digital to analog circuits combine precision analog stages with complex digital circuits. The analog stages of such circuits must have low input offset voltage, low input offset voltage drift over time, low input current, low noise, and high gain.
Conventional approaches to making combined analog and digital circuits use complementary metal-oxide-semiconductors (CMOS) transistors for both the analog stages and the digital stages of the circuit. However, the performance of the analog stages of such circuits has not been satisfactory. Even though such stages have had extremely low input current and acceptable gain, and can be trimmed to have an acceptably low input offset voltage, they have an unacceptably high input offset voltage drift over time.
Metal-oxide-semiconductor (MOS) transistors made using a normal digital CMOS process have a considerable variation in threshold voltage, which determines the input offset voltage of the analog stage in which the transistors are used. Such threshold voltage variations are of no consequence when MOS transistors used in digital circuits. Moreover, the input stages of analog stages made using MOS transistors can be trimmed to reduce the offset voltage to an acceptable level. However, trimming the input offset voltage is to no avail, since the threshold voltage of MOS transistors made using a normal digital CMOS process is unstable. Thus, if an input stage is trimmed to reduce its input offset voltage, the input offset voltage can reappear some time later due to the instability of the threshold voltages of the MOS transistors forming the input stage. Threshold voltage changes of over 60 mV have been observed.
Threshold voltage instability is mainly due to unstable surface states in the silicon-silicon dioxide interface under the gate of the MOS input transistors. Other mechanisms causing threshold voltage instability include unstable states within the gate oxide, and mobile ion drift.
Threshold voltage instability is particularly severe if the circuit is subject to high levels of radiation. High density CMOS circuits that have geometries of less than 1 micron are usually manufactured using a process that includes plasma etching. Plasma etching subjects the circuit to high levels of radiation, and the MOS transistors forming the analog input stages of the circuit consequently suffer from threshold voltage instability. MOS input transistors can also be subject to high levels of radiation if the circuit is operated in an environment in which there are high levels of radiation.
The same mechanism that causes threshold voltage instability also causes analog stages made using CMOS transistors to have a higher than desirable noise level.
Thus, MOS transistors made using a CMOS process have drawbacks that make them unsuitable for use in precision analog stages.
A few steps can be added to a basic CMOS fabrication process to allow bipolar transistors to be made on the same semiconductor substrate as digital CMOS transistors. Bipolar transistors made in such a process have stable and well-matched V.sub.be and current gain. This enables such bipolar transistors to be used as the input stage of a precision analog stage. However, analog stages using bipolar input transistors have a significant input current, which renders them less than ideal.